Renesas SuperH JTAG Emulator

Features:

► Improved functionality for AUD tracing with distinct features

- Augmented information allowance for AUD tracing
With AUD trace information allowance increased to 64-fold of the existing products, more branch information and access data can be acquired at a time.

- Trigger feature for precise identification of the whereabouts of the problem 2
With 2 points of triggers, which were not available in AUD tracing with the existing products, it allows precise identification of the problem points. As trigger, program address, access address, or data can be specified.

- Efficient analysis with various trace modes 2
Besides Free mode, which captures trace data till break or trace stop, with Normal mode, which captures before and after the trigger points, and Start/End mode, which captures from Start trigger to End trigger, it now allows efficient trace analysis.

► CPU tracing feature for efficient analysis of the program behavior 2 3

Efficiently analyzes and presents the information captured in CPU tracing (built in CPU, AUD, etc.).

► Traceback feature which debugs based on the results of CPU tracing *2

Analyzes the contents of CPU trace memory to restore the register and memory values, and thereby allows implementation of pseudo execution and back step execution.

► C0,C1 coverage feature implemented on the basis of AUD tracing *2

- Coverage display in Code Window
- Module coverage display which shows the rate of coverage by function unit
- Area coverage display which shows the executed area of the specified area

► Status bar indication which allows to check the state of the CPU easily *2

- Indicates the CPU clock by sampling : Calculates the CPU clock and presents it in the status bar.
- Indicates the address being executed by sampling: Samples branch addresses during the program execution and presents them in the status bar.

► Undo Trace into feature for undoing Trace into execution that went too far *1

Restores the results of execution back to original state by putting virtual memory and virtual register back to the values before change if Trace into execution (by single step execution) went too far. It allows easy reviewing of simple operations such as re-execution with the values changed and checking of the state before branched.

► Simulated I/O feature which implements printf debugging through JTAG *2

The debugger processes standard input/output of the user program through JTAG. For example, when C library functions such as printf() and scanf() are executed, they will be output to Terminal Window of the debugger and keyboard input will be forwarded to the user program. This feature processes communication between the user program and the debugger in real time without causing break to CPU. Thus, it is perfect for debugging that pursues real time liness.

► Advanced multi-core support

With multi-core debugging specific features such as synchronous execution, synchronous break, and status indication which monitors the state of execution by core, the program in which multiple cores work in coordination can be debugged smoothly.
- Supported MCU: SH7265

► Provided with integrated development environment "CSIDE" Version 5 as standard

Provided with integrated development environment as standard for seamless implementation of development phases from creation of the program to debugging.

► CPU break feature *1

Allows after-execution break of the program and access break upon read/write of data.

► Flash memory support

Supports debugging features such as software breakpoint setting and normal memory rewriting, besides downloading to NOR-type flash memory. Also, new devices can be added easily by using definition file format.

► Real-time stealing feature 2 4

Allows referencing/editing of the memory and I/O during user program execution, and it is perfect for the target debugging that pursues real time liness.

► Performance feature *5

Allows attempt for improvement in performance and measurement of the program performance by measuring number of various cycles, number of accesses, times of execution, etc. during execution with measurement functionality of the CPU.

► ICE-ADP (CPU emulation adapter) *3

With dedicated EVA chip installed for debugging, it allows debugging not constrained by the target as in the case of the traditional CPU in-circuit emulator. For connection to the target, ICE-ADP is to be connected to CPU socket of the target as in the case of the traditional CPU in-circuit emulator.

► Easy update

By unique internet key issuing system, real-time support for newly added CPU, update to the latest version, range of optionally purchased software, etc. has been made feasible.

*1: Specifications vary by CPU.
*2: Supported CPUs are SH-4A, SH4AL-DSP, SH-2A, and SH2A-FPU.
*3: Supported CPUs are SH-2 (SH7080, SH7147/46/25 series).
*4: Supported CPUs are some of SH-2.
*5: Supported CPUs are some of SH-2, SH-2A, SH3-DSP, and SH-4 respectively.

AUD360 model

HUDI140 model

Supported CPUs

SH-2

SH7047F, SH7146F, SH7083F, SH7147F *3, SH7084F, SH7149F, SH7085F, SH7606, SH7086F, SH7618, SH7124F *3, SH7618A, SH7125F *3, SH7619 SH7144F, SH7145F,

SH2-DSP

SH7615, SH7616

SH-2A

SH7206, SH7211F, SH7243F, SH7285F, SH7286F

SH2A-FPU

SH7201, SH7673 SH7203, SH7261, SH7262, SH7263, SH7264, SH7670, SH7671, SH7672,

SH2A-DUAL

SH7205, SH7265

SH-3

SH7705, SH7706, SH7709S

SH3-DSP

SH7290(SH-Mobile1), SH7720, SH7721, SH7294(SH-MobileJ), SH7727, SH7729, SH7300(SH-MobileV), SH7729R SH7710,SH7712, SH7713,

SH-4

SH7750R, SH7750S, SH7751, SH7751R, SH7760

SH-4A

SH7723(SH-MobileR2), SH7785 SH7730, SH7763, SH7764, SH7770, SH7774, SH7780, SH7781,

SH4AL-DSP

SH7343(SH-Mobile3AS), SH7354(SH-MobileL3V), SH7722(SH-MobileR)

Target I/F

Voltage

Output :1.2V - 3.6V (Follows target) or fixed to 3.3V Input :5V-torelant

1.8V-5.5V (Follows target). Note, for 5V-spec CPUs, output level will be min. 4.2V - max. 4.7V.

Voltage measurement

Measures by sampling and shows the results with accuracy of 50mV and precision showing 2 decimal places.

Connector *1

36-pin MDR connector, 40cm cable

14-pin MIL connector, 20cm cable

H-UDI clock

Can be set freely in 0.5MHz increments between 1MHz and 20MHz.

Transition display of function *2

Presents transition of executed functions as a graph.

Module measurement feature *2

Indicates function execution time.

Trace-back feature (Optional) *2

Allows to analyze the information captured into trace memory and implement pseudo execution and back step execution.

Simulated I/O feature *2

Allows to execute standard input and output function on the target against the host.

Undo Trace into feature *2

Feature to virtually go back in Trace into

execution (Single-step execution)

AUD coverage feature (Optional) *2

Feature to show the rate of execution for the specified range based on the results of captured AUD trace data. (C0/C1 coverage)

Supports referencing/editing of register, memory, and I/O and downloading to memory during break. For SH-2A and SH-4A, it supports referencing/editing of register, memory, and I/O even during execution of the user program.

Flash memory support

On-chip flash memory:

Supports software break settings, ordinary memory rewriting, and also security feature in addition to downloading.

External flash memory:

Supports software break settings and ordinary memory rewriting feature in addition to downloading.

Software break feature

Supports up to 256 points with instruction replacement method.

Execution time measurement

Measures execution time of the user program (64-bit counter, measurement unit=50nS)

Debugger included as standard

CSIDE for PALMiCE3 SuperH-E

CSIDE for PALMiCE3 SuperH-A-E

General specifications

Power specification

DC+5V 350mA (Vbus support for USB)

DC+5V 250mA (Vbus support for USB)

Outside dimensions

95mm(W) ×70mm (D) ×21mm (H)

Host I/F

USB mini-B connector

Supported host computer

DOS/V compatibles equipped with USB2.0 interface (Windows2000 (Service Pack 4 onward) / Windows XP (Service Pack 1 onward) / Windows Vista)

Product composition contents

PALMiCE3 AUD360 model main unit set / 2m USB cable / dedicated debugger (CD-ROM)

PALMiCE3 HUDI140 model main unit set / 2m USB cable / dedicated debugger (CD-ROM)